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 M56710FP
F2F Magnetic Stripe Encoding Card Reader
REJ03F0175-0201 Rev.2.01 Mar 31, 2008
Description
The M56710FP is a semiconductor integrated circuit of Bi-CMOS structure having an F2F demodulator function for magnetic card reader.
Features
* * * * * Low current dissipation (0.7 mA when on standby as a standard) Provided with glance-over selection input (4, 8, and 16 bits) Provided with output polarity ("L" active or "H" active) switching input Miniature mini-mold package Wide operating temperature range Ta = -20 to 75C
Application
Magnetic card reader
Functional Description
Data signal which is read from magnetic card via magnetic head is input from HD2 and HD1 pins., and converted into F2F pattern signal by analog processing in amplifier OP1, differentiator OP2, sensitivity setting circuit and waveform shaping circuit. If F2F signal is input, the logic section glances over the prescribed number of bits set by IB1 and IB2 input before performing digital processing, and then outputs card reading signal CLS, read clock signal RCP, and read data signal RDT. INV turning to "L" switches each output of CLS. RCP and RDT from "L" active to "H" active. * Standard Bits: Let the number of glance-over bits set by IB1 and IB2 be M. Let the Mth FC (flux change) through M+1st FC after LDI input is turned from "L" to "H" be a standard bit with a time width of TB0. I/O is discriminated from the next bit to this standard bit as a data bit. * I/O discrimination Let the data bit time width of a data bit be TBn, and if there is one next FC between the FC at the end of that bit (i.e. the beginning of the next bit) to 5/7TBn, let the next bit (Bn+1) be data "1", and, if there is no FC, be data "0". * Output signal time width When letting the oscillation cycle of oscillation circuit be TOSC. RCP output pulse width TOW: about 16 TOSC RCP delay time to RDT: about 8 TOSC
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 1 of 13
M56710FP
Block Diagram
Amplifier Differentiator output input Noise filter AMP PKI PKO 6 5 4 F2F output F2F 3
Amplifier (-) input HD2 7 Amplifier (+) input HD1 8 Reference voltage output VRF 9
- +
OP1
- +
OP2
Sensitivity setting
Waveform shaping
20 VCC1 Power supply 19 VCC2 Power supply
Reference voltage circuit
14 INV Invert input 13 CLS Card travelling signal output
Control circuit
Read control input LDI 1 Ignore bit 2 IB2 15 Ignore bit 1 IB1 16
12 RDT Read data output 11 RCP Read clock output
5TOSC
1/5
Oscillation capacitor CX2 17 Oscillation capacitor CX1 18
11 bit downcounter
Oscillation circuit
TOSC 1/7 7TOSC 11 bit upcounter
10 GND
Pin Arrangement
M56710FP
Read control input LDI NC F2F output F2F
1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11
VCC1 VCC2 CX1 CX2 IB1 IB2 INV CLS
Power supply Power supply Oscillation capacitor Oscillation capacitor Ignore bit 1 Ignore bit 2 Invert input Card travelling signal output
Noise filter PKO Differentiator input PKI
Amplifier output AMP Amplifier (-) input HD2 Amplifier (+) input HD1 Standard voltage output VRF
RDT Read data output RCP Read clock output
Grounding GND
(Top view)
NC: no connection
Outline: PRSP0020DA-A (20P2N-A)
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 2 of 13
M56710FP
I/O Circuit
1. LDI, IB1, IB2 input circuit 2. INV input circuit
VCC2 LDI IB1 IB2 GND INV
VCC2
GND
3. CLS, RDT, RCP output circuit
VCC2 CLS RDT RCP GND
Pin Function Description
Pin No. 1 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pin Name LDI F2F PKO PKI AMP HD2 HD1 VRF GND RCP RDT CLS INV IB2 IB1 CX2 CX1 VCC2 VCC1 Name Read control input F2F output Noise filter Differentiator input Amplifier output Amplifier (-) input Amplifier (+) input Reference voltage output Grounding Read clock output Read data output Card travelling signal output Invert input Ignore bit 2 Ignore bit 1 Oscillation capacitor Oscillation capacitor Power supply Power supply Function Schmidt trigger input. At "L", reset the internal digital circuit. At "H", F2F modulation is possible. F2F signal output that has amplified, differentiated and further waveform-shaped the magnetic head signal. Connect noise removing capacitor CNF between PKI and PKO. Refer to PKO and AMP. Connect resistor RPK and capacitor CPK between AMP and PKI. Connect magnetic head between HD1 and HD2. Connect magnetic head between HD1 and HD2. Reference voltage output of VCC 1/2 Clock pulse output after F2F modulation Data output after F2F modulation Signal output indicating that card is travelling CLS, RDT and RCP output becomes "L" active at "H" (OPEN), and "H" active at "L". Glance-over bit setting pin Glance-over bit setting pin Connect capacitor COSC between CX1 and CX2 to set oscillation frequency. Connect capacitor COSC between CX1 and CX2 to set oscillation frequency. Digital circuit section power supply pin. Supply voltage is VCC. Analog circuit section power supply pin. Supply voltage is VCC (same voltage as VCC2).
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 3 of 13
M56710FP
Glance-Over Bit Setting and Timing By IB1 and IB2
Number of glanceover bits 4 8 16
IB2 input L L H
IB1 input L H L
H Note:
H IB2, IB1 : "L", "L"
--
Description Internal digital circuit is reset with LDI input at "L". LDI input may be at "H" at all times. CLS output turns to "L" after counting the flux change FC (change in the status of F2F) of the number of glance-over bits, and returns to "H" when BIC (bit interval counter) has fully counted. (At "L" active). --
x F2F
1
2
3
4
TBO: Reference bit
LDI BIC full count CLS About 14300 TOSC
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 4 of 13
M56710FP
Operating Timing Diagram
IB2, IB1: "L", "L" INV: "H"
HD2-HD1 F2F LDI (5/7)
Bit 1/0 discrimination signal TB0 Reference bit TBn TBn+ 5/7TBn
CLS RCP RDT
0 0 0 0 1 0 1 1 0
RDT data is output 1 bit behind F2F data.
HD2-HD1 F2F LDI (5/7)
CLS RCP RDT
0 0 0 0 1 0 0 0 0 0 0 1 0 1 1 0 0
Absolute Maximum Ratings
(Ta = -20 to 75C, unless otherwise noted)
Item Supply voltage Input voltage Input voltage Output voltage Differential input voltage Operating temperature Storage temperature Symbol VCC VI VI IO VID Topr Tstg Ratings -0.3 to +6.5 -0.3 to VCC+0.3 -0.3 to VCC+0.3 -10 to +10 -1.2 to +1.2 -20 to 75 -55 to 125 Unit V V V mA V C C Conditions VCC1, VCC2 LDI, IB1, IB2, INV HD1, HD2 CLS, RDT, RCP Between HD2 and HD1 pins
Notes: 1. Voltage is based on GND pin of the circuit (0 V), unless otherwise noted. 2. Direction of the current flowing into the circuit is represented by "positive" (without code) and that flowing out of the circuit by "negative" (-code).
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 5 of 13
M56710FP
Recommended Operating Conditions
(Ta = -20 to 75C, unless otherwise noted)
Item Supply voltage Input voltage "H" input voltage "L" input voltage "H" output current "L" output current Differential input voltage Input frequency Oscillation frequency External capacitor External capacitor External resistor External capacitor External capacitor External resistor External capacitor External capacitor CX1, CX2 CX1, CX2 AMP PKI PKI, PKO PKI, F2F VCC1, VCC2 VRF VCC1, VCC2 LDI IB1, IB2, INV IB1, IB2, INV CLS, RDT, RCP CLS, RDT, RCP HD2-HD1 HD2-HD1 Symbol VCC VI VIH VIL IOH IOL VIN fIN fOSC COSC COSC RPK CPK CNF RPF CVC CVR Min 4.0 0 0.8VCC 0 -0.5 0 3 0.3 0.2 25 -- -- -- -- -- -- 0.8 Limits Typ 5 -- -- -- -- -- -- -- -- -- 33 470 0.033 220 4.7 0.1 1 Max 5.5 VCC VCC 0.2VCC 0 5 80 15 2 100 -- -- -- -- -- -- 2 Unit V V V V mA mA mVp-p kHz MHz pF pF F pF M F F Test Conditions VCC1 and VCC2 shall have the identical voltage.
fOSC = 1/TOSC fOSC 1/COSC Reference value when corresponding to 210BPI Reference value when corresponding to 210BPI Reference value when corresponding to 210BPI Reference value Reference value Reference value Reference value
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 6 of 13
M56710FP
Electrical Characteristics
(Ta = -20 to 75C, VCC = 5 V, unless otherwise noted)
Test Circ uit -- 2 2 2 2 2 2 2 2 Limits Min 0.3VCC -- -- 3.8 3.2 -10 -80 -10 -250 Typ -- -- -- -- -- -- -- -- -- Max 0.7VCC 0.2 0.4 -- -- +10 -10 +10 -50 Unit V V V V V A mA A A Test Conditions VCC = 4 to 5.5 V VCC = 4 V IOL = 10 A IOL = 5 mA VCC = 4 V IOH = -10 A IOH = -0.5 mA VCC = 5.5 V, VI = 0 V
Item Threshold voltage "L" output voltage "H" output voltage "L" input current "L" input current "H" input current Positive threshold current Reference voltage Voltage gain 1 Voltage gain 2 Input resistance Maximum output voltage "L" sensitivity current "H" sensitivity current Positive threshold voltage Negative threshold voltage Threshold differential voltage Pin voltage range "L" output voltage "H" output voltage Positive threshold voltage IB1, IB2, INV CLS, RDT, RCP CLS, RDT, RCP LDI, IB1, IB2 INV LDI, IB1, IB2, INV INV
Symbol VTH VOL VOH IIL IIL IIH IIT+
VCC = 5.5 V, VI = 0 V VCC = 5.5 V, VI = 5.5 V VCC = 5.5 V, VI = VTH
VRF OP1 OP1 OP1 OP1 PKI - F2F PKI - F2F PKI - F2F
VREF GV11 GV21 RIN1 VOPP1 IIL2 IIH2 VTH+2
1 3 3 3 3 4 4 5
2.3 18 18 7 2 -- 0.3 0.2
2.5 20 20 10 -- -- -- 0.45
2.7 24 24 14 -- -0.3 -- 0.7
V Double Double k Vp-p A A V
VIN = 0 mVp-p fIN = 1 kHz VIN = 80 mVp-p sine wave fIN = 15 kHz VIN = 80 mVp-p sine wave fIN = 1 kHz VIN = 80 mVp-p sine wave fIN = 1 kHz sine wave THD AMP = 5% VM, F2F < 0.5 V VM, F2F > 4.5 V On the VRF basis
PKI - F2F
VTH-2
5
-0.7
-0.45
-0.2
V
On the VRF basis
PKI - F2F
VTHD2
--
-0.15
--
0.15
V
(VTH+2) - VTH-2
PKO F2F F2F LDI
VPKO VOL3 VOH3 VTH+4
4 5 5 6
-1.2 -- 4.5 2.5
-- -- -- --
1.2 0.5 -- 3.5
V V V V
On the VRF basis PK = 1 mA - +1 mA VPKI = 0 V, IF2F = 0.5 mA VPKI = 5 V, IF2F = -0.5 mA
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 7 of 13
M56710FP (Ta = -20 to 75C, VCC = 5 V, unless otherwise noted)
Test Circ uit 6 Limits Min 1.5 Typ -- Max 2.7 Unit V Test Conditions
Item Negative threshold voltage Hysterisis width Standby circuit current Operating circuit current Oscillation frequency Output pulse width Intra-output delay time Input noise width Note: LDI
Symbol VTH-4
LDI VCC1, VCC2 VCC1, VCC2
VHY4 ICCW ICCR
-- 1 1
0.5 -- --
-- 0.7 1.9
1.5 1.0 2.4
V mA mA
(VTH+4) - (VTH-4) VIN = 0 mVp-p fIN = 8.2 kHz VIN = 68 mVp-p sine wave fOSC = 1 MHz COSC = 33 pF fOSC = 1 MHz fOSC = 1 MHz
RCP RCP RDT, RCP INV
fOSC TOW TOD TNW
1 7 7 7
0.75 15 7 0.5
-- 16 8 --
1.5 17 9 --
MHz s s s
1. Min. and max. limits do not represent absolute values. 2. Typ. limits represent standard values when Ta = 25C and VCC = 5V.
Test Circuit
On the following drawing, COSC = 33 pF, RPK = 470 , CPK = 0.033 F, CNF = 470 pF, CVR = 1 F 1. Testing of VREF, ICCW, ICCR, fosc
VCC A LDI VCC1 VCC2 F2F CNF RPK CPK PKO PKI AMP HD2 HD1 VIN, fIN VREF V VRF GND CX1 CX2 IB1 IB2 INV CLS RDT RCP fOSC Oscilloscope COSC ICCW ICCR
RCP TOW
fOSC =
16 TOW
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 8 of 13
M56710FP 2. Testing of VOL, VOH, IIL, IIH, IIT+
VCC LDI VCC1 VCC2 F2F PKO PKI AMP HD2 HD1 CVR VRF GND CX1 CX2 IB1 IB2 INV CLS RDT RCP VOL VOH V IOL IOH COSC IIH IIL IIT+ A VI
Note: Short the IB1 and IB2 to the GND when those pins are not used for testing.
3. Testing of GV11, GV21, RIN1, VOPP1
VCC
LDI
VCC1 VCC2 CX1 CX2 IB1 IB2 INV CLS RDT RCP
THD meter (ON at VOPP1) CNF RPK CPK VM.AMP V VOPP1 10 k 10 k
CVR
F2F PKO PKI AMP HD2 HD1 VRF GND
COSC
(OFF at RIN)
VIN, IIH
VM.AMP VIN 2VM.AMP RIN1 = x 10 (k) GV11 * VIN - VM.AMP GV11 =
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 9 of 13
M56710FP 4. Testing of IIH2, IIL2, VPKO
VCC LDI VCC1 VCC2 F2F PKO PKI AMP VM.F2F VM.PKO IPKI V IIH2 IIL2 HD2 HD1 CVR VRF GND CX1 CX2 IB1 IB2 INV CLS RDT RCP COSC
Note: IIL2 is PKI input current providing VM.F2F < 0.5 V. IIH2 is PKI input current providing VM.F2F > 4.5 V. VPKO = VM.PKO - VREF
5. Testing of VTH+2, VTH-2, VOL3, VOH3
VCC LDI (ON at VOL3 and VOH3) 5 k F2F PKO PKI VM.F2F VOL3 V VOH3 VPKI CVR AMP 5 k HD2 HD1 VRF GND VCC1 VCC2 CX1 CX2 IB1 IB2 INV CLS RDT RCP COSC
IF2F
VCC VPKI 0V "H" VM.F2F "L" VPKI+ VPKI-
VTH+2 = VREF - VPKI- VTH-2 = VREF - VPKI+
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 10 of 13
M56710FP 6. Testing of VTH+4, VTH-4
VCC LDI VLDI F2F PKO PKI AMP HD2 HD1 VRF GND VCC1 VCC2 CX1 CX2 IB1 IB2 INV CLS RDT RCP V VM.CLS
VCC VLDI 0V "H" VM.CLS "L"
VTH+4 VTH-4
7. Testing of TOW, TOD, TNW
VCC
LDI F2F 5 k PKO PKI AMP HD2 HD1 CVR VRF GND
VCC1 VCC2 CX1 CX2 IB1 IB2 INV CLS RDT RCP
CLK CLK
RCP fOSC duty 50 %
TOW
Logic pattern generator
RDD TOD VCC INV 0V RCP Noise input TNW TOD
Oscilloscope (ON at TNW) Note: TNW, a negative noise put into INV input, is the maximum time interval not considered INV input.
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 11 of 13
M56710FP
Application Example
When setting the glance-over bit to 16 bits to let it be "L" active output
5V
1 LDI 2 3 F2F RPF CNF 5 PKI CPK RPK 6 AMP 7 HD2 8 HD1 9 VRF CVR 10 GND 4 PKO
VCC1 20 VCC2 19 CVC CX1 18 COSC CX2 17 IB1 16 IB2 15 INV 14 CLS 13 RDT 12 RCP 11
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 12 of 13
M56710FP
Package Dimensions
JEITA Package Code P-SOP20-5.3x12.6-1.27 RENESAS Code PRSP0020DA-A Previous Code 20P2N-A MASS[Typ.] 0.3g
20 11
HE
*1
E
F
1 Index mark
10
NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET.
c
*2 D
A2
A1
Reference Symbol
Dimension in Millimeters
*3 e bp y Detail F
D E A2 A1 A bp c HE e y L
Min Nom Max 12.5 12.6 12.7 5.2 5.3 5.4 1.8 0.1 0.2 0 2.1 0.35 0.4 0.5 0.18 0.2 0.25 0 8 7.5 7.8 8.1 1.12 1.27 1.42 0.1 0.4 0.6 0.8
A
REJ03F0175-0201 Rev.2.01 Mar 31, 2008 Page 13 of 13
L
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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When exporting the products or technology described herein, you should follow the applicable export control laws and regulations, and procedures required by such laws and regulations. 4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document, please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com ) 5. 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